In a hardware dataflow architecture, a software program may be implemented using pipelined hardware. Such implementation can provide a dramatic performance improvement, as multiple data paths resulting from conditional operations can be implemented to execute concurrently. The dataflow architecture uses dependencies defined by the dataflow graph of a program to determine those operations that can be executed, based on the availability of the data that each operation requires for execution. When the data required by an operation is available, the operation proceeds.
A dataflow architecture typically uses dataflow memory to pass data between components as it is processed and a shared memory to store data as instructed by the software program. The dataflow memory may include first-in-first-out (FIFO) buffers between pipeline stages of a dataflow architecture. Alternatively, a token memory may be monitored by a scheduler, which issues instructions when operands are tagged as being available in the token memory.
For some applications of a dataflow architecture, it may be desirable to access a memory that is external to the dataflow memory. For a dataflow architecture having FIFO buffers between pipeline stages, the external memory is in addition to the FIFO buffers, and for a dataflow architecture having a token memory that is monitored by a scheduler, the external memory is in addition to the token memory. The external memory, which is random access, may be used for inputting data to the dataflow or outputting data from the data flow. However, in order to produce semantically correct results in executing a program on a dataflow machine, operations requiring accesses to the shared memory must be synchronized so a write operation does not proceed before all read operations for the existing data have completed.
The present invention may address one or more of the above issues.